Search This Site
Bare Die Distribution. Bare Die, Wafer and Package Devices at ES Components
  Search By Mfg Search By Part#

 
 

    Got A QuestionGot A Question? Let ES Components Help You Achieve Better Results!
  ______________________________________________________________________________________________________________
  technical library  
     
  ES Components has compiled technical data and statistical information that have been derived from information supplied by manufacturers, distributors and the internet. Although we believe that the information supplied is generally correct, we do not assume any responsibility whatsoever for its accuracy.    
     

 



 

Our partner Vishay manufacturer of discrete semiconductors & passive components
One of the world's largest manufacturers of discrete semiconductors and passive components.









Leading manufacturer of IC solutions for the worldwide analog, Ethernet and high bandwidth markets.

  Die Products (References)  
     
View  Introduction To Die Products Unpackaged die allow designers to overcome the challenges of small form factor applications.
     
View  Known Good Die Known-Good-Die (KGD) processing allows for better yields and improved short-term reliability.
     
View  Known Good Die Myths Four myths about Known-Good-Die (KGD).
     
View  Die Case Studies Innovative uses of die products in four different applications.
     
  >>Die Assembly Processes  
     
View System-In-Package Assembly Combining all of the electronic components.
  >>Wafer Thinning References
  >>Die Attach  
  >>Wire Bond  
  >>Assembly Process  
  >>Module Testing  
     
View Flip-Chip Assembly Offers optimized electrical performance in addition to optimized miniaturization.
  >>Solder Flip Chip References
  >>Underfill Encapsulation  
  >>Adhesive Flip Chip  
  >>Wafer Level Packaging  
  >>Process Flow  
  >>Process Considerations  
     
View Chip-On-Board (COB) Assembly Provides the capability to perform direct chip to chip wiring that facilitates improved performance and strong functional integration in many modern high speed applications.
  >>Process  
  >>PCB Preparation  
  >>Die Attach  
  >>Encapsulation  
  >>More Encapsulation  
     
View Challenges In Bare Die Mounting Challenges In Bare Die Mounting
(Larry Gilg Die Products Consortium Austin,Texas)
     
     
  Quality & Reliability  
     
View Guidelines For Handling Die General Guidelines For Handling Die
     
View Visual Inspection Criteria Visual criteria for the inspection of unpackaged die and wafers.
  >>Contamination  
  >>Cracks  
  >>Bridging & Shorting  
  >>Glassification  
  >>Scratches  
  >>Delamination  
     
View Assembly Workmanship Criteria Criteria covering die placement, encapsulation, spacing, wirebond, and rebonding.
  >>Encapsulation  
  >>Spacing  
  >>Wirebond  
  >>Rebonding  
     
View Chip On Board (COB) Reliability Life test, evaluation systems, process flow design issues.
     
     
  General Guidelines  
     
View Storage, Handling, & Shipping of Die Products Safe handling guidelines for packaged ICs that are practiced in the Surface Mount Technology (SMT) assembly industry, and to provide information to purchasers of wafer and die products.
  >>Handling  
  >>Shipping Materials  
  >>Shipping Technologies  
  >>Mounting and Dicing  
     
View Bare Die Product Standards An overview of Bare Die standards
  >>Developing New Standards  
  >>Existing Statndards  
     
     
  Articles Useful articles relating to Bare Die technologies.
     
  >>Burn-in Effectiveness -- Theory & Measurement  
  >>Defect level as a Function of Fault Coverage  
  >>Die Products: Ideal IC Packaging for Demanding Applications  
     
     
     
     
     
     
     
     
     
     
     
     
     
     
     
     
     

  ______________________________________________________________________________________________________________
 
 
108 Pratts Junction Road / Sterling, MA 01564 / Phone: 978-422-7641 / Fax: 978-422-0011